1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an LCD device and a method of fabricating the same.
2. Discussion of the Related Art
LCD devices are favored as display devices because they are light weight, have a thin profile, and do not consume much power. In general, an LCD device is a non-emissive display device that displays images using a refractive index difference incorporating optically anisotropic properties of liquid crystal material that is interposed between an array (TFT) substrate and a color filter (CF) substrate. Among the various types of LCD devices commonly used, active matrix LCD (AM-LCD) devices have been favored because of their high resolution and superiority in displaying moving images. The AM-LCD device includes a thin film transistor (TFT) per each pixel region as a switching device, a first electrode for ON/OFF, and a second electrode called a common electrode.
FIG. 1 is a schematic plan view showing a related art LCD device, and FIG. 2 is a schematic cross-sectional view showing an LCD device according to the related art.
In FIGS. 1 and 2, an LCD device 1 includes a first substrate 11, a second substrate 61 facing the first substrate 11, and a liquid crystal layer 90 between the first and the second substrates 11 and 61 respectively. Specifically, the first substrate 11 includes a first display area “DA1” having a first side “S1” and a second side “S2” adjacent to the first side “S1,” and third and fourth sides “S3” and “S4,” and a first non-display area “NDA1” at the first and the second sides “S1 and S2.”
The second substrate 61 includes a second display area “DA2” corresponding to the first display area “DA1” and having the first to fourth sides “S1” to “S4.”
A seal pattern 85 is substantially formed to surround the first to fourth sides “S1” to “S4” of the first and the second substrates 11 and 61.
A gate electrode 15, a gate insulating layer 20, a semiconductor layer 23 and a source electrode 33 and a drain electrode 35 are sequentially layered on an inner surface of the first substrate 11 and constitute a thin film transistor “Tr.”
A gate line 13 is connected to the gate electrode 15. A data line 30 is connected to the source electrode 33 and crosses the gate line 13 to define a pixel region “P.”
A passivation layer 40 is formed on the thin film transistor “Tr” and has a drain contact hole 43 that exposes a portion of the drain electrode 35. A pixel electrode 50 is formed on the passivation layer 40 in the pixel region “P” and is connected to the drain electrode 35 via the drain contact hole 43.
A black matrix 63 is formed on an inner surface of the second substrate 61 and includes a first black matrix pattern 63a in a first non-pixel region (not shown) at a boundary between the pixel regions P and a second black matrix pattern 63b in a second non-pixel region (not shown) in a periphery of the second display area “DA2.” A color filter layer 66 is formed on the black matrix 63 and includes red, green and blue sub-color filters 66a, 66b and 66c. The first black matrix pattern 63a is substantially disposed between the red, green and blue sub-color filters 66a, 66b and 66c. 
A common electrode 70 is substantially formed on the black matrix 63 and the color filter layer 66. The common electrode 70 and the pixel electrode 50 may include a transparent conductive material.
Furthermore, a gate pad 52 extends from an end portion of the gate line 13 and a data pad 54 extends from an end portion of the data line 30 and are formed in the first non-display area “NDA1” corresponding to the first and the second sides “S1” and “S2,” respectively.
As explained above, the first substrate 11 has the first non-display area “NDA1” displaced from the second display area “DA2” of the second substrate 61. In other words, whole areas of the second substrate 61 correspond to the first display area “DA1” of the first substrate 11. Therefore the second substrate 61 does not have an extended region exposed from the first substrate 11.
A common voltage is provided to the common electrode 70 through a common line (not shown) formed in the first non-display area “NDA1” corresponding to the first side “S1” or the second side “S2” through silver (Ag) dots 83 disposed at four corners between the first substrate 11 and the second substrate 61 to connect the common electrode 70, respectively, and the common line (not shown) formed in the first display area “DA1” and the second display area “DA2.”
Accordingly, the LCD device 1 according to the related art has the Ag dot 83 substantially on an inner portion of the seal pattern 85, therefore, it is practically impossible to measure whether or not the common voltage is normally applied to the common electrode 70.
Further, upon forming the Ag dot 83, the first substrate 11 and the second substrate 61 may not be electrically connected to each other due to an insufficient amount of Ag dots 83.
Accordingly, when Ag dot 83 defects are increased, image quality of the LCD device 1 is reduced because of increased resistance of the common electrode 70.
In other words, it is impossible to measure whether or not the common voltage is normally applied to the common electrode 70 through the Ag dot 83. Consequently, defects arising from the Ag dot 83 cannot be measured through the related art LCD structure.